
BU9889GUL-W (8Kbit)
Datasheet
● Write Command
○ Write cycle
? Arbitrary data is written to EEPROM. When to write only 1 byte, byte write normally used, and when to write continuous
data of 2 bytes or more, simultaneous write is possible by page write cycle.
S
W
T
R
S
A
R
T
SLAVE
ADDRESS
I
T
E
WORD
ADDRESS
DATA
T
O
P
SDA
LINE
1 0 1 0 A2 P1 P0
WA
7
WA
0
D7
D0
R A
A
A
/
C
C
C
W K
K
K
Figure 31. Byte write cycle
S
W
T
A
R
I
S
T
R
SLAVE
T
WORD
O
T
ADDRESS
E
ADDRESS(n)
DATA(n)
DATA(n+15)
P
SDA
LINE
1
0 1
0 A2 P1 P0
WA
7
WA
0
D7
D0
D0
R A
A
A
A
/
C
C
C
C
W K
K
K
K
Figure 32. Page write cycle
? Data is written to the address designated by word address (n-th address).
? By issuing stop bit after 8bit data input, write to memory cell inside starts.
? When internal write is started, command is not accepted for tWR (5ms at maximum).
? By page write cycle, the following can be written in bulk: Up to 16 bytes
And when data of the maximum bytes or higher is sent, data from the first byte is overwritten.
(Refer to "Internal address increment " in Pape14.)
? As for page write command, after page select bit(PS) of slave address is designated arbitrarily, by continuing data input of
2 bytes or more, the address of insignificant 4 bits is incremented internally, and data up to 16 bytes can be written.
○ Notes on write cycle continuous input
At STOP (s top bit )
write starts.
S
T
A
R
T
SL AVE
ADDRESS
W
R
I
T
E
WORD
ADDRESS ( n)
DATA(n)
DATA(n+15)
S
T
O
P
S
T
A
R
T
SDA
LINE
1 0 1 0 A2 P1 P0
WA
7
WA
0
D7
D0
D0
1 0 1 0
R A
/ C
W K
A
C
K
A
C
K
A
C
K
Next command
tW R(maximum : 5ms)
Command is not accepted for this
Figure 33. Page write cycle
period.
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TSZ22111 ? 15 ? 001
13/23
TSZ02201-0R2R0G100490-1-2
05.SEP.2012 Rev.001